In processes for manufacturing a semiconductor device, film formation by a sputtering method or a chemical vapor deposition method, planarization by a chemical mechanical polishing method, and patterning by a lithography method and an etching method are repeated a large number of times. In order to ensure a yield of the semiconductor device, a wafer is extracted in the middle of the manufacturing processes, and is subjected to defect inspection. Defects include contaminant particles on a surface of the wafer, and scratch thereon, and pattern defects thereon (a short circuit, an open circuit, etc.). A preferred aim of the defect inspection is to manage a state of a manufacturing apparatus and specify a process in which a defect has occurred and a cause of the defect.
An optical defect inspection apparatus that irradiates a wafer with light to acquire an image has a higher throughput than a defect inspection apparatus of another type such as an electron beam type, and therefore, is frequently used for inline inspection. As a semiconductor device is miniaturized, defect size to be detected decreases, improvement in detection sensitivity is required.
In the wafer, hundreds of devices (referred to as chips) having the same pattern as each other are formed with a constant pitch. Also, in a memory unit of the device or others, a large number of cells having the same pattern as each other are formed with a short pitch. In the optical defect inspection apparatus, a method of detecting the defect by comparing images between the chips or between cells is used.
A specific defect detection method is disclosed in, for example, Japanese Patent Application Laid-Open Publication No. 2007-33073 (Patent Document 1). In chip comparison, positions of two images (an inspection image and a reference image) of the chips which are adjacent to each other are aligned, and then, a difference between them is obtained. In cell comparison, positions of two images of cells which are separated from each other by an integral multiple of a repetitive pitch are aligned, and then, a difference between them is obtained. In the obtained difference image, a position having a pixel value larger than a threshold value is determined to be the defect. Here, the threshold value is set so as to detect a real defect and not to detect a false defect caused by variation (noise) in the pixel value as much as possible. Therefore, in order to improve the detection sensitivity, it is important to enhance a signal-to-noise ratio of the difference image.
Also, Japanese Patent Application Laid-Open Publication No. 2011-8482 (Patent Document 2) discloses that the pixel value of the difference image has a positive value or a negative value depending on cases in the defect inspection apparatus using the image comparison.
Note that a configuration illustrated in FIG. 9 described later has been described in a document, Mark Bohr, Kaizad Mistry, “Intel's Revolutionary 22 nm Transistor Technology”, p. 8, [online] May 2011, [retrieved on 2013 24 Sep.], Retrieved from the internet <URL:http://www.intel.com/content/www/us/en/silicon-innovations/revolutionary-22nm-transistor-technology-presentation.html> (Non-Patent Document 1).